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Tuesday, April 22, 3:20 PM~5:20 PM Ballroom A
T3 ： High Performance, Ultralow Power CMOS Materials and Devices
Chair(s)： Horng-Chih Lin, National Yang Ming Chiao Tung University

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    3:20 PM~3:50 PM
    T3-1 BEOL-compatible Oxide Semiconductor Devices: Promising Technology Enablers for Future Monolithic 3D Integrated Circuits
    Gong Xiao, National University of Singapore
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    3:50 PM~4:20 PM
    T3-2 Nanosheet Extensions and CFETs to Boost PPA Gain
    Chee Wee Liu, National Taiwan University
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    4:20 PM~4:50 PM
    T3-3 What’s Needed to Make 2D Semiconductors Useful for Electronics?
    Eric Pop, Stanford University
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    4:50 PM~5:20 PM
    T3-4 Addressing Key Process Roadblocks to Enable Epitaxial MX2 and Layer Transfer in a 300mm Fab
    Souvik Ghosh, imec

Wednesday, April 23, 10:20 AM~11:50 AM Ballroom B
T5 ： Quantum Computing Devices and Materials
Chair(s)： Pei-Wen Li, National Yang Ming Chiao Tung University

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    10:20 AM~10:50 AM
    T5-1 Hole Spin Qubits in Si-MOS and Ge Heterostructures: Origins and Recent Progresses
    Xavier Jehl, CEA Grenoble
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    10:50 AM~11:20 AM
    T5-2 Devices Utilizing New Materials for Semiconductor Quantum Technologies
    Tomohiro Otsuka, Tohoku University
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    11:20 AM~11:50 AM
    T5-3 Quantum Advantage: Quantum Computing and Quantum Memory Hardware Design- A Practical Approach
    Wei-Ti Liu, Quantum Technology, Saratoga

Wednesday, April 23, 10:20 AM~11:50 AM Ballroom D
D5 ： GaN/SiC Electronics
Chair(s)： Ching-Jan Chen, National Taiwan University

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    10:20 AM~10:50 AM
    D5-1 The Advantages of SiC MOSFETs for High Efficiency Power Supplies
    Cheng-Tyng Yen, Fast SiC Semiconductor Inc.
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    10:50 AM~11:20 AM
    D5-2 Compound Semiconductor for AI & AI for Compound Semiconductor
    Tian-Li Wu, National Yang Ming Chiao Tung University
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    11:20 AM~11:50 AM
    D5-3 Evolution of Power Semiconductors in Electric Vehicles and Development Trends of GaN Devices
    Shinichi Hoshi, MIRISE Technologies Corporation

Wednesday, April 23, 1:40 PM~5:30 PM Ballroom A
T7 ： Emerging Technologies for High-Performance Computing
Chair(s)： Edward Chen, TSMC
Albert Cheng, TSMC

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    1:40 PM~2:10 PM
    T7-1 Lateral Thermal Atomic Layer Etching of 2D MoS2
    Steven M. George, University of Colorado Boulder
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    2:10 PM~2:40 PM
    T7-2 Hitting Atomic Limits: Advances in (Area-Selective) Atomic Layer Deposition to Enable the Angstrom Era
    Wilhelmus Mathijs Marie Kessels, Eindhoven University of Technology
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    2:40 PM~3:10 PM
    T7-3 Chemical and Mechanical Optimization over Structure and Interfaces in 2D Semiconductors
    Andrew J. Mannix, Stanford University
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    3:30 PM~4:00 PM
    T7-4 Integrated Lithium Niobate Nonlinear Photonics
    Mengjie Yu, University of California, Berkeley
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    4:00 PM~4:30 PM
    T7-5 Pre-Calibration of Initial Phases for Operating Programmable Photonic Integrated Circuits
    Ming-Chang Lee, National Hsing Hua University
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    4:30 PM~5:00 PM
    T7-6 Low-energy AI Computing with Photonic Integrated Circuits
    Zaijun Chen, University of California, Berkeley
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    5:00 PM~5:30 PM
    T7-7 Pockels Materials for Next Generation Computing and Communication
    Christian Haffner, imec

Wednesday, April 23, 3:30 PM~5:00 PM Ballroom C
D9 ： 3D Integration Circuit
Chair(s)： Hann-Huei Tsai, Taiwan Semiconductor Research Institute

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    3:30 PM~4:00 PM
    D9-1 BBCubeTM Large-Scale 3DI using WOW/COW Hybrid Processes
    Takayuki Ohba, Institute of Science Tokyo
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    4:00 PM~4:30 PM
    D9-2 Siemens Physical Verification solution in 3DICs
    Yoyo Li, Siemens EDA
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    4:30 PM~5:00 PM
    D9-3 3DIC Physical Design Flow: Recent Progress and Perspectives
    Chung-Ching Peng, Intel Corporation

Thursday, April 24, 10:20 AM~11:50 AM Ballroom B
T11 ： Advanced Memory Technology
Chair(s)： Masaharu Kobayashi, The University of Tokyo

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    10:20 AM~10:50 AM
    T11-1 Next-generation NAND Technology
    Wanki Kim, Samsung Electronics Co., Ltd.
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    10:50 AM~11:20 AM
    T11-2 Reliability Issues and Optimization Strategies in HfO2 Based Ferroelectric Field Effect Transistors
    Kechao Tang, Peking University
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    11:20 AM~11:50 AM
    T11-3 Overview of Capacitor-less 3D DRAM using Gate Controlled Thyristor (GCT)
    Hang-Ting Lue, Macronix International Co., Ltd.

Thursday, April 24, 10:20 AM~12:20 PM Ballroom C
D11 ： Hardware Security
Chair(s)： Tsung-Te Liu, National Taiwan University
Hirofumi Shinohara, Kyoto University

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    10:20 AM~10:50 AM
    D11-1 Physical Attack Surfaces and Countermeasures of Secure ICs in Flip Chip Packaging
    Makoto Nagata, Kobe University
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    10:50 AM~11:20 AM
    D11-2 A Secure and Robust Design of the Samsung TRNG System: Compliance with NIST SP 800-90A/B/C, AIS 20/31, and ISO 26262 ASIL-D as a Root of Trust
    Yong Ki Lee, Samsung Electronics Co., Ltd.
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    11:20 AM~11:50 AM
    D11-3 Performance Evaluation in Hardware Security: Upper-bounds by Attacks and Lower-bounds by Models
    Takeshi Sugawara, The University of Electro-Communications
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    11:50 AM~12:20 PM
    D11-4 Ultra-Low-Cost Circuits for Chip Security and Trust
    Kaiyuan Yang, Rice University

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