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Tuesday, April 19, 1:40 PM~5:30 PM Ballroom B
J2
:
Smart Edge: From Digital to Unconventional Approach
1:40 PM~2:15 PM
J2-1
Bio-Chips for Fast Medial Tests
Chen-Yi Lee, National Yang Ming Chiao Tung University
李鎮宜
View Biography
2:15 PM~2:50 PM
J2-2
Circuits and Architectures for Next-generation Attentive & Intelligent Systems
Massimo Alioto, National University of Singapore
View Biography
2:50 PM~3:25 PM
J2-3
Practical Considerations of In-Memory Computing in the Deep Learning Accelerator Applications
Jen-Wei Liang, MediaTek
梁仁尉
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3:45 PM~4:20 PM
J2-4
Status and Challenges of In-memory Computing for Neural Accelerators
Daniele Ielmini, Politecnico di Milano
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4:20 PM~4:55 PM
J2-5
Compute-in-memristor: A System and Technology Co-Optimization (STCO) Approach
Huaqiang Wu, Tsinghua University, Beijing
吳華強
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4:55 PM~5:30 PM
J2-6
Intelligent Vision System Using Processing-in-sensor for Smart Edge Applications
Chih-Cheng Hsieh, National Tsing Hua University
謝志成
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Wednesday, April 20, 1:40 PM~5:30 PM Ballroom B
J5
:
Photonic IC Combining Circuit Design and Technologies
1:40 PM~2:15 PM
J5-1
Silicon Photonics for Next Generation Computing Systems
Koji Yamada, National Institute of Advanced Industrial Science and Technology (AIST)
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2:15 PM~2:50 PM
J5-2
Development Trends of Silicon Photonics Coherent Transceivers
Yin-Chieh Lai, National Yang Ming Chiao Tung University
賴暎杰
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2:50 PM~3:25 PM
J5-3
Hybrid Thin-film In-plane III-V/Si-related Photonic Integration
Yi-Jen Chiu, National Sun Yat-sen University
邱逸仁
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3:45 PM~4:20 PM
J5-4
Silicon Photonics for Scaling the Cloud and Enabling AI
Yoojin Ban, imec
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4:20 PM~4:55 PM
J5-5
Design of Ultra-high-speed Transmitters Beyond 100Gb/s in CMOS Technology
Pen-Jui Peng, National Tsing Hua University
彭朋瑞
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4:55 PM~5:30 PM
J5-6
A Silicon Photonics Technology for 400 Gbit/s Applications
Ming-Wei Lin, Taiwan Semiconductor Research Institute
林銘偉
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PAGE CONTENTS
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J2 :
Smart Edge: From Digital to Unconventional Approach
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J5 :
Photonic IC Combining Circuit Design and Technologies
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