Tuesday, April 20, 12:50 PM~5:30 PM Ballroom C

T3 ： Poster Session

• T3-1 A 500V SOI-LIGBT With Multiple Deep-Oxide Trenches For Fast Turn-OFF
  

  Yongjiu Cui, Jie Ma, Long Zhang, Jing Zhu, Weifeng Sun, Xinyu Liu, Wangming Cui, and Zhixiang Zhou
  Southeast University
  
• T3-2 Back-Gate Network Extraction Free from Dynamic Self-Heating in FD SOI
  

  Lucas Nyssens, Martin Rack, Arka Halder, Martin Vanbrabant, Valeriya Kilchytska, and Jean-Pierre Raskin
  Université catholique de Louvain
  
• T3-3 Suppressed Source-to-Drain Tunneling and Short-Channel Effects for MFIS-type InGaAs and Si Negative-Capacitance FinFETs
  

  Shih-En Huang and Pin Su
  National Chiao Tung University, Taiwan
  
• T3-4 Benchmarking the Performance of Heterogeneous Stacked RRAM with CFET-SRAM and MRAM for Deep Neural Network Application Amidst Variation and Noise
  

  Parthasarathi Pal¹, Sunanda Thunder², Min-Jung Tsai¹, Po-Tsang Huang², and Yeong Her Wang^{1
  1}National Cheng Kung University
  ²National Chiao Tung University, Taiwan.
  
• T3-5 Transfer Characteristics of CMOS Inverter using “Steep SS PN-Body Tied SOI-FET”
  

  Shota Ishiguro¹, Jiro Ida¹, Takayuki Mori¹, and Koichiro Ishibashi^{2
  1}Kanazawa Institute of Technology
  ²The University of Electro-Communications
  
• T3-6 Analysis of Drain Current Enhancement on “PN-Body Tied SOI-FET” 
  -Bulk vs Surface Conduction Mode and Low Vds Saturation Effect-
  

  Hiroki Ito¹, Jiro Ida¹, Takayuki Mori¹, and Koichiro Ishibashi^{2
  1}Kanazawa Institute of Technology
  ²The University of Electro-Communications
  
• T3-7 Calculation of Field Dependent Mobility in MoS₂ and WS₂with Multi-Valley Monte Carlo Method
  

  Pin-Fang Chen¹, Yuh-Renn Wu^{1,2
  1}National Taiwan University
  ²Industrial Technology Research Institute
  
• T3-8 Improved Switching Time in Negative Capacitance Junctionless Transistors
  

  Manish Gupta and Vita Pi-Ho Hu
  National Taiwan University
  
• T3-9 Machine Learning Approach to Predicting Tunnel Field-Effect Transistors
  

  Chandni Akbar, Narasimhulu Thoti, and Yiming Li
  

  National Chiao Tung University, Taiwan
• T3-10 A precise debugging method and defect diagnosis with mass big-data analysis in the designed high-dense array for rapid yield improvement in a logic platform
  

  Chan-Ching Lin¹, Shenzhi-Yang Lin², Ryan Liang¹, Chi-Pei Lu¹, Cheng-Shu Ho¹, Chieh Lo¹, Shao-Yu Hsu¹, Jim-Chen Chen¹, Fan Lan², Weiwei Pan², Sa Zhao², Yongjun Zheng², and Shou-Zen Chang^{1
  1}Powerchip Semiconductor Manufacturing Corp.
  ²Semitronix
  
• T3-11 A Novel Design of Ferroelectric Nanowire Tunnel Field Effect Transistors
  

  Narasimhulu Thoti and Yiming Li
  National Chiao Tung University
  
• T3-12 Ferroelectric Characterization in Ultrathin Hf_0.5Zr_0.5O₂ MFIS Capacitors by Piezoresponse Force Microscopy (PFM) in Vacuum
  

  Cheng-Hung Wu¹, Artur Useinov¹, Tian-Li Wu¹, and Chun-Jung Su^{2
  1}National Chiao Tung University, Taiwan
  ²Taiwan Semiconductor Research Institute
  
• T3-13 Selective Area Epitaxy of Axial Wurtzite -InAs Nanowire on InGaAs NW by MOCVD
  

  Deepak Anandan, Edward Yi Chang, Hung Wei Yu, Hua Lun Ko, Venkatesan Nagarajan, and Sankalp Kumar Singh
  National Chiao Tung University, Taiwan
  
• T3-14 Impact of Interfacial Layer on the Switching Characteristics of HZO-based Ferroelectric Tunnel Junction
  

  Haolin Li, Pengying Chang, Gang Du, Jinfeng Kang, and Xiaoyan Liu
  Peking University
  
• T3-15 Alleviation of Charge Trapping and Flicker Noise in HfZrO₂-Based Ferroelectric Capacitors by Thermal Engineering
  

  Sourav De¹, Wei-Xuan Bu¹, Bo-Han Qiu¹, Chung-Jun Su², Yao-Jen Lee², and Darsen D. Lu^{1
  1}National Cheng Kung University
  ²Taiwan Semiconductor Research Institute
  
• T3-16 Improvement of Nanotwinned Copper Thermal Stability for High Temperature Heterogeneous Integration
  

  Wei-Lan Chiu, Ying Tzu Hung, Ou-Hsiang Lee, Tsung Yu Ou-Yang, Hsiang-Hung Chang, and Wei-Chung Lo
  Industrial Technology Research Institute
  

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Tuesday, April 20, 1:40 PM~3:55 PM Ballroom A

T1 ： Advanced CMOS Technology

• 1:40 PM~2:15 PM

  T1-1 TBD
  

  
  
• 2:15 PM~2:35 PM

  T1-2 FinFET Plus: A Scalable FinFET Architecture with 3D Air-Gap and Air-Spacer Toward the 3nm Generation and Beyond
  

  C. K. Chiang¹, H. Pai¹, J. L. Lin², J. K. Chang¹, M. Y. Lee¹, E. R. Hsieh², K. S. Li³, G. L. Luo³, Osbert Cheng⁴, and S. S. Chung^{1
  1}National Chiao Tung University, Taiwan
  ²National Central University
  ³Taiwan Semiconductor Research Institute
  ⁴United Microelectronics Corp
  
• 2:35 PM~2:55 PM

  T1-3 The First Ge Nanosheets GAAFET CMOS Inverters Fabricated by 2D Ge/Si Multilayer Epitaxy, Ge/Si Selective Etching
  

  Chun-Lin Chu, Guang-Li Luo, Szu-Hung Chen, Wei-Yuan Chang, Wen-Fa Wu and Wen-Kuan Yeh
  Taiwan Semiconductor Research Institute, National Applied Research Laboratories
  
• 2:55 PM~3:15 PM

  T1-4 Sub-60 mV/dec Germanium Nanowire Field-Effect-Transistors with 2-nm-thick Ferroelectric Hf_0.5Zr_0.5O₂
  

  Y.-W. Lin¹, T.-Y. Yu², C.-J. Su², Y.-N. Chen¹, H.-H. Chang¹, G.-L. Luo², C.-T. Wu², W.-F. Wu², K.-L. Lin², F.-J. Hou², Y.-C. Wu¹, and W.-K. Yeh^{2
  1}National Tsing Hua University
  ²Taiwan Semiconductor Research Institute
  
• 3:15 PM~3:35 PM

  T1-5 The Powerful Methods of Flicker Noise Improvement in 22nm Technology
  

  Achilles Fang, Jen Wei Pan, Widson Wu, Sheng Cho, Wei Jun Chen, Jia Bin Yeh, Zhi Cheng Lee, You Ren Liu, Kai Lin Lee, Leonard Chen, Vincent Hsueh, S .W. Hsieh, Ta Kang Lo, Jakent Pai, Daniel Chen, Yao Chin Cheng, Steven Hsu, Osbert Cheng, and G. C. Hung
  United Microelectronics Corp.
  
• 3:35 PM~3:55 PM

  T1-6 Si Cryo-CMOS and Quantum Dots for Quantum Computing Applications
  

  Yu-Jui Wu¹, Chih-Ying Chiang¹, Hung-Yu Tsao¹, Min-Jui Lin¹, Pu-Jia Hsieh¹, Ching-Chen Yeh¹, Wei-Ren Syong¹, Kai-Syang Hsu¹, Chi-Te Liang¹, Jeng-Chung Chen², and Jiun-Yun Li^{1,3
  1}National Taiwan University
  ²National Tsing-Hua University
  ³Taiwan Semiconductor Research Institute, National Applied Research Laboratories
  

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Tuesday, April 20, 1:40 PM~3:55 PM Mezzanine A+B

T4 ： Non-Volatile Memories

• 
  1:40 PM~2:15 PM

  T4-1 The Pursuit of Atomistic Switching and Cross Point Memory (Invited)
  

  DerChang Kau, Intel
  
• 2:15 PM~2:35 PM

  T4-2 An 8kb spin-orbit-torque magnetic random-access memory
  

  Guan-Long Chen¹, I-Jung Wang¹, Po-Shao Yeh¹, Sih-Han Li¹, Shan-Yi Yang¹, Yu-Chen Hsin¹, Hsin-Tsun Wu¹, HsuMing Hsiao¹, Yao-Jen Chang¹, Kuan-Ming Chen^1,3, SK Ziaur Rahaman¹, Hsin-Han Lee¹, Yi-Hui Su¹, Fang-Ming Chen¹,
  Jeng-Hua Wei¹, Shyh-Shyuan Sheu¹, Chih-I Wu^1,2, and Denny Tang^{1
  1}Industrial Technology Research Institute
  ²National Taiwan University
  ³National Chiao Tung University
  
• 2:35 PM~2:55 PM

  T4-3 Ultrahigh Spin-Orbit Torque Efficiency at Spin Reorientation Transition State in Pt/Co Multilayer
  

  Fen Xue¹, Shy-Jay Lin², Mahendra DC¹, Chong Bi¹, Xiang Li¹, Wilman Tsai¹, and Shan X. Wang^{1
  1}Stanford University, US
  ²Taiwan Semiconductor Manufacturing Company, Taiwan
  
• 2:55 PM~3:15 PM

  T4-4 Multi-bit cryogenic flash memory on Si/SiGe and Ge/GeSi heterostructures
  

  Wei-Chih Hou¹, Nai-Wen Hsu¹, Hsiang-Shun Kao¹, and Jiun-Yun Li^{1, 2
  1}National Taiwan University
  ²Taiwan Semiconductor Research Institute
  
• 3:15 PM~3:35 PM

  T4-5 Bandgap-Engineered Tunneling Layer on Operation Characteristics of Poly-Ge Charge-Trapping Flash Memory Devices
  

  Jung-En Tsai, Kuei-Shu Chang-Liao, and Hsin-Kai Fang
  National Tsing Hua University
  
• 3:35 PM~3:55 PM

  T4-6 A Twin Bit AND-Type Multiple-Time-Programming Memory Cell by Nano-scaled High–k Metal Gate Process
  

  Che-Wei Chu, Chrong Jung Lin, and Ya-Chin King
  National Tsing Hua University
  

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Tuesday, April 20, 4:15 PM~5:55 PM Mezzanine A+B

T5 ： Oxide Transistors and BEOL/Process Technology

• 4:15 PM~4:35 PM

  T5-1 BEOL Compatible Indium-Tin-Oxide Transistors: Switching of Ultra-High-Density 2D Electron Gas over 0.8×10¹⁴ /cm² by Ferroelectric Polarization
  

  Mengwei Si, Zehao Lin, Junkang Li, Chang Niu, Xiao Lyu, Dongqi Zheng, and Peide D. Ye
  Purdue University
  
• 4:35 PM~4:55 PM

  T5-2 Double-Layer Amorphous InGaZnO Thin Film Transistors with High Mobility and High Reliability
  

  Song-Ling Li¹, Ming-Xuan Lee¹, Chia-Chun Yen¹, Tsang-Long Chen², Cheng-Hsu Chou², and C. W. Liu^{1
  1}National Taiwan University

  ²Innolux Corporation
• 4:55 PM~5:15 PM

  T5-3 Grain Structure – Resistivity Relationship of Ru ALD Precursors
  

  Michael Breeden, Victor Wang, Francis Yu, and Andrew C. Kummel
  University of California, San Diego
  
• 5:15 PM~5:35 PM

  T5-4 Asymmetry Low Temperature Cu-Polymer Hybrid Bonding with Au Passivation layer
  

  Ming-Wei Weng, Shan-Yu Mao, Demin Liu, Han-Wen Hu, Kuan-Neng Chen
  National Chiao Tung University
  
• 5:35 PM~5:55 PM

  T5-5 On-Wafer Electronic Layer Detectors Array (ELDA) for e-beam Imaging in Advanced Lithographic Systems
  

  Chien-Ping Wang¹, Burn Jeng Lin¹, Jiaw-Ren Shih¹, Yue-Der Chih², Jonathan Chang², Chrong Jung Lin¹, and Ya-Chin King¹
  1National Tsing Hua University
  2Taiwan Semiconductor Manufacturing Company
  

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Wednesday, April 21, 10:20 AM~12:00 PM Ballroom C

T7 ： Power and RF Devices

• 10:20 AM~10:40 AM

  T7-1 High Voltage Gain 4H-SiC CMOS Technology Featuring LOCal Oxidation of SiC (LOCOSiC) Isolation and Balanced Gate Dielectric
  

  Bing-Yue Tsui, Chia-Lung Hung, Ya-Ru Jhuang, Yi-Ting Huang, Jung-Chien Cheng, Fang-Hsin Lu, Yi-Ting Shih, Ya-Hsin Lee, Liang-Yu Chen, Fu-Hsiang Chuang, and Pei-Wen Li
  National Chiao Tung University
  
• 10:40 AM~11:00 AM

  T7-2 CMOS-compatible GaN HEMT on 200mm Si-substrate for RF application
  

  Po-Chun Yeh¹, Po-Tsung Tu¹, Hsueh-Hsing Liu¹, Chien-Hua Hsu¹, Hsin-Yun Yang¹, Yi-Keng Fu¹, Li-Heng Lee¹, Pei-Jer Tzeng¹, Yuh-Renn Wu^1,2, Shyh-Shyuan Sheu¹, Wei-Chung Lo¹, and Chih-I Wu^{1,2
  1}Industrial Technology Research Institute
  ²National Taiwan University
  
• 11:00 AM~11:20 AM

  T7-3 Si MOSFETs with GaN-Drain for RF Power Applications
  

  Tien-Tung Luong¹, Jessie Lin¹, Jessie Chuang¹, Jason Woo², and Edward Yi Chang¹
  1National Chiao Tung University, Taiwan
  2University of California, Los Angeles
  
• 11:20 AM~11:40 AM

  T7-4 Superior High-Frequency Performance of T-Gated Poly-Si TFTs
  

  Y. A. Huang¹, K. P. Peng¹, H. C. Lin¹, P. W. Li¹, K. M. Chen², and G. W. Huang²
  

  ¹National Chiao Tung University, Taiwan

  ²Taiwan Semiconductor Research Institute
• 11:40 AM~12:00 PM

  T7-5 FD-SOI mm-Wave Differential Single-Pole Switches with Ultra-High Isolation
  

  Martin Rack¹, Lucas Nyssens¹, Sidina Wane², Damienne Bajon², Dimitri Lederer¹, and Jean-Pierre Raskin^{1
  1}Université catholique de Louvain

  ²eV-Technologies

   

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Thursday, April 22, 10:20 AM~12:35 PM Ballroom A

T10 ： Ferroelectric FETs and Memories

• 
  10:20 AM~10:55 AM

  T10-1 Ferroelectric and Antiferroelectric materials (Invited)
  

  Dina Triyoso, Tokyo Electron Technology Center, America, LLC
  
• 10:55 AM~11:15 AM

  T10-2 Current percolation path impacting switching behavior of ferroelectric FETs
  

  Franz Müller¹, Maximilian Lederer¹, Ricardo Olivo¹, Tarek Ali¹, Raik Hoffmann¹, Halid Mulaosmanovic², Sven Beyer³, Stefan Dünkel³, Johannes Müller³, Stefan Müller⁴, Konrad Seidel¹, and Gerald Gerlach⁵
  1Fraunhofer IPMS-CNT
  2NaMLab gGmbH
  3GLOBALFOUNDRIES
  4Ferroelectric Memory GmbH
  5Technische Universität Dresden
  
• 11:15 AM~11:35 AM

  T10-3 DFT Models of Ferroelectric Hafnium-Zirconium Oxide Stacks With and Without Dielectric Interlayers
  

  Kisung Chae^1,2, Andrew Kummel¹, Kyeongjae Cho^{2
  1}University of California San Diego
  ²The University of Texas at Dallas
  
• 11:35 AM~11:55 AM

  T10-4 Ultra-thin Hf_0.5Zr_0.5O₂ Ferroelectric Tunnel Junction with High Current Density
  

  Yueh-Hua Chu¹, Hsin-Hui Huang¹, Yu-Hao Chen¹, Chien-Hua Hsu², Pei-Jer Tzeng², Shyh-Shyuan Sheu², Wei-Chung Lo², Chih-I Wu^2,3, and Tuo-Hung Hou^{1,2
  1}National Chiao Tung University, Taiwan
  ²Industrial Technology Research Institute
  ³National Taiwan University
  
• 11:55 AM~12:15 PM

  T10-5 Three-dimensional (3D) Non-volatile SRAM with IWO Transistor and HZO Ferroelectric Capacitor
  

  Yuan-Chun Luo¹, Suman Datta², Shimeng Yu^{1
  1}Georgia Institute of Technology
  ²University of Notre Dame
  
• 12:15 PM~12:40 PM

  T10-6 Comparison of 2-T FeFET Nonvolatile Memory Cells: Gate Select vs. Drain Select
  

  Bo-Kai Huang, Wei-Xiang You, and Pin Su
  National Chiao Tung University, Taiwan
  

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PAGE CONTENTS

• -T3 :
   Poster Session
• -T1 :
   Advanced CMOS Technology
• -T4 :
   Non-Volatile Memories
• -T5 :
   Oxide Transistors and BEOL/Process Technology
• -T7 :
   Power and RF Devices
• -T10 :
   Ferroelectric FETs and Memories