| Call for Papers
We appreciate your interest in submitting a paper to the 2021 International Symposium on VLSI Design, Automation, and Test (2021 VLSI-DAT). Herewith forms and information are provided for your preparation of paper submission.
♣ Note : The paper submission system is for paper session only, not for invited speaker.
♣ Important Dates : All are based on Taiwan time, which is eight hours ahead of Greenwich Mean Time (23:59 GMT+8)
• Paper Submission Deadline : October 15, 2020
• Notification of Paper Acceptance : December 31, 2020
• Final Paper (IEEE compatible version) Submission Deadline : January 31, 2021
• Author Registration Deadline : February 28, 2021
♣ Original, unpublished papers on all aspects of VLSI Design, Automation and Test are solicited, including but not limited to:
|
ANALOG DESIGN
|
DIGITAL DESIGN
|
SOC
|
EDA
|
TEST
|
AI applications
|
|
Biomedical Circuits
|
Communication Baseband Designs
|
CPU, DSP and Multicore Architectures
|
Analog EDA
|
3D IC and Interposer-Based IC Test
|
AI ASIC Architecture
|
|
Energy-Harvesting and Power Management Circuits
|
Digital Circuits and ASICs
|
Embedded System and Software
|
Design for Manufacturability
|
Design-for-Testability and BIST
|
AI Learning Model (Algorithms)
|
|
Sensor and Interface Circuits
|
Hardware Security and Trust
|
Multimedia Processing Designs
|
Design Verification
|
Memory Test
|
AI for EDA
|
|
Memristive and Neuromorphic Circuits
|
Low Voltage & Low Power Circuits Design
|
SOC and NOC Architectures
|
EDA for Microfluidic Biochips
|
On-Chip Monitoring
|
Compiler for AI Chips
|
|
RF, Analog and Mixed Signal Circuits
|
Memory Circuits and
|
System-in-Package Designs
|
Electronic System Level Design
|
RF, Analog and Mixed-Signal Test
|
Integrated Development Environment for AI
|
|
Security Circuits for IoT and AI
|
Wired and IO Design
|
|
Hardware/Software Co-Design
|
Silicon Debug and Diagnosis
|
New Service Using AI
|
|
Ultra Low-Power Circuits and Systems
|
|
|
Logic and Behavioral Synthesis
|
SOC and System Level Test
|
|
| |
|
|
Physical Design and Verification
|
Yield and Reliability Enhancement
|
|
| |
|
|
Modeling and Simulation
|
Test Generation and Compression
|
|
| |
|
|
Power/Thermal Estimation and Optimization
|
Test Standards
|
|
♣ General Instructions
|
• Prospective authors must submit a self-contained paper with figures and tables electronically through the conference website by October 15, 2020 (23:59 GMT+8) 
|
|
• The length of a submitted paper must be 2-4 pages. Any submissions not adhering to the length constraint will be returned immediately without review.
|
|
• In addition to the paper and camera-ready manuscript  , the submission should be included with a 80~100 Word ABSTRACT, which will be published in the advance and final program if the paper is accepted.
|
|
• VLSI-DAT adopts the DOUBLE BLIND REVIEW process; please DO NOT reveal your name(s) or affiliation(s) anywhere in the submitted manuscript for the first paper submission.
|
|
• Before submitting your abstract/paper, please review the information on IEEE Intellectual Property Rights at http://www.ieee.org/web/publications/rights/index.html
|
|
• The notices of acceptance will be sent out to authors on December 31, 2020.
|
|
• Any changes on title and author list or withdraw after acceptance must be approved by Technical Program Co-Chairs.
|
|
• For an accepted paper to be published in the proceedings, one of its co-author(s) MUST pay the full registration fee by February 28, 2021 23:59 (GMT+8) and attend the symposium to present the paper. Note that each accepted paper shall be accompanied by a different full registration; that is, two full registrations are required for presenting two papers even if the presenter is the same.
|
|
• Presentation of accepted papers at the symposium must be in English and will be limited to 18 minutes with an additional 2 minutes for Q&A. The final manuscript of all accepted papers will be published as submitted in the proceedings.
|
|
• No-show papers will not be included in the symposium proceedings and will not be submitted to the IEEE Xplore database.
|
♣ Student Subsidy 
• All students are entitled to get a discount of up to 85% on the registration fee.
• Financial supports are available for full-time student presenters living outside of Taiwan.
♣ Special Session Submission
To encourage industry and research institutes to share their experiences on system and product development, 1 or 2-page papers on system prototyping and product development are solicited. Submission to this special session should specifically select the paper category of System Prototyping / Product Development to be reviewed separately from the regular submissions.
♣ Best Paper Award
Two best papers will be selected this year through a rigorous evaluation process, which is conducted by the program committee and session chairs.