Thursday, April 22, 10:20 AM~11:20 AM Ballroom D
D10 Area of AI Accelerators, Design Methodology and Hardware Software Co-design

  • the photo of Speaker
    10:20 AM~10:40 AM
    D10-1 ONNC Compiler used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design
    Shu-Ming Liu, Skymizer Taiwan Inc.
  • the photo of Speaker
    10:40 AM~11:00 AM
    D10-2 Intelligence Everywhere: The Challenges and Opportunities for Semiconductor Designs
    Kinny Chen, NEUCHIPS Corp.
  • the photo of Speaker
    11:00 AM~11:20 AM
    D10-3 TinyML as-a-Service - Bringing ML Inference to the Deepest IoT Edge
    Hiroshi Doyu, Ericsson

Thursday, April 22, 11:30 AM~12:30 PM Ballroom D