Contact
Welcome
General Info.
About VLSI-TSA and VLSI-DAT Symposia
Travel Information
Organization
Executive Committee
General Co-Chairs
Technical Program Committee
Joint Special Sessions
DAT Special Sessions
Industrial Sessions
Tutorial
Local Organizing Committee
Program
Agenda
Joint Opening & Award Ceremony
Joint Plenary Sessions
Joint Luncheon Keynote
Joint Special Sessions
DAT Special Sessions
Industrial Sessions
Tutorial
Paper Sessions
Cocktail Reception
Invited Speakers
The Guidelines for Invited Speakers
Authors
Call for Papers
Final Paper Submission
The Guidelines for Oral Presenter
Financial Support (Overseas Students Only)
Best Paper Award
Attendees
Virtual Networking Platform for 2021 VLSI-TSA and VLSI-DAT
Venue Information
Hotel Information
Registration
Thursday, April 22, 10:20 AM~11:20 AM Ballroom D
D10
:
Area of AI Accelerators, Design Methodology and Hardware Software Co-design
10:20 AM~10:40 AM
D10-1
ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design
Shu-Ming Liu, Skymizer Taiwan Inc.
劉恕民
View Biography
10:40 AM~11:00 AM
D10-2
Intelligence Everywhere: The Challenges and Opportunities for Semiconductor Designs
Pin-Han Chen, NEUCHIPS Corp.
陳品函
View Biography
11:00 AM~11:20 AM
D10-3
A TinyMLaaS Ecosystem for Machine Learning in IoT: Overview and Research Challenges
Hiroshi Doyu, Ericsson
View Biography
Thursday, April 22, 11:30 AM~12:30 PM Ballroom D
D11
:
Parallel AI Processing and Chiplets
11:30 AM~11:50 AM
D11-1
Flexible Acceleration of Data Processing with RISC-V DSP, Vector and Custom Extensions
Charlie Hong-Men Su, Andes Technology Corp.
蘇泓萌
View Biography
11:50 AM~12:10 PM
D11-2
Tensor-Centric Processor Architecture for Applications in Advanced Driver Assistance Systems
Yu-Sheng Lin, Inventec Inc.
林裕盛
View Biography
12:10 PM~12:30 PM
D11-3
Opportunity and Challenge of Chiplet-Based HPC and AIoT
Jie-Wei Lai, Spreadtrum Communications (former)
賴玠瑋
View Biography
PAGE CONTENTS
-
D10 :
Area of AI Accelerators, Design Methodology and Hardware Software Co-design
-
D11 :
Parallel AI Processing and Chiplets
Top
×
Close