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2020 VLSI-DAT Author Instructions for Oral Presentation
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Registration
Tuesday, August 11, 3:10 PM~4:50 PM Ballroom C
D2
:
AI Applications
3:10 PM~3:35 PM
D2-1
Edge-AI Based Cattle Behavior Estimation System for Grazing
Hiroyuki Ito, Tokyo Institute of Technology
View Biography
3:35 PM~4:00 PM
D2-2
AI in Transportation and Video Inference Speedup
Hung-Hsuan Lin, Industrial Technology Research Institute
林宏軒
View Biography
4:00 PM~4:25 PM
D2-3
Computing-In-Memory & Processing-In-Sensor techniques for Low-Power Edge Devices
Kea-Tiong Tang, Industrial Technology Research Institute
鄭桂忠
View Biography
4:25 PM~4:50 PM
D2-4
Intelligent Document Recognition on Financial Process Automation
Wen-Pin Hsu, Industrial Technology Research Institute
許文彬
View Biography
Wednesday, August 12, 10:20 AM~12:05 PM Ballroom D
D3
:
Robustness and Security of ICT
10:20 AM~10:55 AM
D3-1
CAD for Security: A Full Reverse Engineering Toolchain from Layout to RTL
Yier Jin, University of Florida
View Biography
10:55 AM~11:30 AM
D3-2
Hardware Trojan Detection at Run-time Using Machine-Learning Techniques
Krishnendu Chakrabarty, Duke University
View Biography
11:30 AM~12:05 PM
D3-3
Security Done Right: Start at the Heart of the SoC
Dana Neustadter, Synopsys
View Biography
Wednesday, August 12, 3:20 PM~5:05 PM Ballroom D
D9
:
Recent Advances in DARPA ERI
3:20 PM~3:55 PM
D9-1
Overview of the OpenROAD Digital Design Flow from RTL to GDS
Sherief Reda, Brown University
View Biography
3:55 PM~4:30 PM
D9-2
Programming Systems for Parallelizing VLSI CAD and Beyond
Tsung-Wei Huang, University of Utah
View Biography
4:30 PM~5:05 PM
D9-3
Bringing Powerful Machine-Learning Systems to Daily-Life Devices via Algorithm-Hardware Co-Design
Yingyan Lin, Rice University
View Biography
Thursday, August 13, 10:25 AM~12:10 PM Ballroom C
D11
:
Next Generation Computing Technology Trend RISC-V and Its Solution
10:25 AM~11:00 AM
D11-1
The Rise of RISC-V from Edge to Cloud
Charlie Hong-Men Su, Andes Technology Corp.
蘇泓萌
View Biography
11:00 AM~11:35 AM
D11-2
AI Acceleration with RISC-V for Edge Computing
Chia-Hsiang Yang, National Taiwan University
楊家驤
View Biography
11:35 AM~12:10 PM
D11-3
Experiments and Optimizations for TVM on RISC-V Architectures with P Extension
Jenq-Kuen Lee, National Tsing Hua University
李政崑
View Biography
PAGE CONTENTS
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D2 :
AI Applications
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D3 :
Robustness and Security of ICT
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D9 :
Recent Advances in DARPA ERI
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D11 :
Next Generation Computing Technology Trend RISC-V and Its Solution
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