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Tuesday, April 23, 1:30 PM~2:50 PM Ballroom C
D1 ： Emerging Ideas for Future Testing Challenges

  • 1:30 PM~1:50 PM
    D1-1 A Novel Test Generation Method for Small Delay Defects with User-Defined Fault Model
    Chao-Jun Shang ,Cheng-Hung Wu, Kuen-Jong Lee and Yu-Hsiang Chen, National Cheng Kung University 
  • 1:50 PM~2:10 PM
    D1-2 ATPG and Test Compression for Probabilistic Circuits
    Kai-Chieh Yang, Ming-Ting Lee and James Chien-Mo Li, National Taiwan University
  • 2:10 PM~2:30 PM
    D1-3 Reversible Scan Based Diagnostic Patterns
    Yu Huang, Szczepan Urban, Wu-Tung Cheng, Manish Sharma, Fengju Niu, Junna Zhong and Wen-Lung Hsu, Mentor
  • 2:30 PM~2:50 PM
    D1-4 Primitive Concept Identification In A Given Set Of Wafer Maps
    1Ahmed Wahba, 1Chuanhe Shan,1 Li-C. Wang and 2Nik Sumikawa,
    1UCSB
    2NXP

Tuesday, April 23, 3:10 PM~4:10 PM Ballroom C
D2 ： Sensing Interface

  • 3:10 PM~3:30 PM
    D2-1 A Current-Mode Differential Sensing CMOS Imager for Optical Linear Encoder

    You-Shin Chen1, Tzu-Hsiang Hsu1, Chien-Wen Chen2 and Chih-Cheng Hsieh1,
    1National Tsing Hua University
    2Industrial Technology Research Institute

  • 3:30 PM~3:50 PM
    D2-2 An Analog Front-End Circuit for CO2 Sensor Readout in 0.18-μm CMOS Process
    Deng-Kai Lin, Chih-Chan Tu, Shih-Kai Kuo and Tsung-Hsien Lin
    , National Taiwan University
  • 3:50 PM~4:10 PM
    D2-3 A Power-efficient, Bi-directional Readout Interface Circuit for Cyclic-voltammetry Electrochemical Sensors
    Yi-Chia Chen, Shao-Yung Lu, Jui-Hsiang Tsai and Yu-Te Liao, National Chiao Tung University

Tuesday, April 23, 4:30 PM~5:30 PM Ballroom C
D3 ： Memories

  • 4:30 PM~4:50 PM
    D3-1 A 30ns 16Mb 2b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application

    Sebastian Kiesel1,Thomas Kern2, Bernhard Wicht3 and Helmut Graeb1,
    1Technical University of Munich 
    2Infineon Technologies AG
    3Leibniz University Hannover

  • 4:50 PM~5:10 PM
    D3-2 A Reliable, Low-Cost, Low-Energy Physically Unclonable Function Circuit Through Effective Filtering
    Shih-Lien Lu ,Cheng-En Lee, Peter Noel, Ted Wong, Saman Adham and Jonathan Chang, TSMC
  • 5:10 PM~5:30 PM
    D3-3 A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-threshold SRAM
    First:Lih-Yih Chiou,National Cheng Kung University
    Second:Chi-Ray Huang,National Cheng Kung University
    Other:Chang-Chieh Cheng ,National Cheng Kung University
    Other:Jin-Yu Huang,National Cheng Kung University
    Other:Wei-Suo Ling,National Cheng Kung University

Wednesday, April 24, 10:20 AM~11:20 AM Mezzanine A+B
D5 ： IP Protection

  • 10:20 AM~10:40 AM
    D5-1 A Lightweight 1.16 pJ/bit Processor for the Authenticated Encryption Scheme KetjeSR
    Yun-Wen Lu1, Antoon Purnal2, Simon Vandenhende2, Chen-Yi Lee1, Ingrid Verbauwhede2 and Hsie-Chia Chang1,
    1National Chiao Tung University, Taiwan
    2K.U.Leuven, Belgium
  • 10:40 AM~11:00 AM
    D5-2 A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology
    Yuan-Hsi Chou1 and Shih-Lien Lu2,
    1University of Michigan
    2TSMC
  • 11:00 AM~11:20 AM
    D5-3 A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms
    Dominik Šišejković1, Farhad Merchant1, Rainer Leupers1, Gerd Ascheid1 and Volker Kiefer2,
    1RWTH Aachen University
    2Hensoldt Cyber GmbH

Wednesday, April 24, 11:30 AM~12:30 PM MezzanineA+B
D6 ： EDA for Emerging Technologies

  • 11:30 AM~11:50 AM
    D6-1 Reactant Minimization for Multi-Target Sample Preparation on Digital Microfluidic Biochips using Network Flow Models
    Kang-Yi Fan1, Shigeru Yamashita2 and  Juinn-Dar Huang1,
    1National Chiao Tung University
    2Ritsumeikan University
  • 11:50 AM~12:10 PM
    D6-2 NNSim: A Fast and Accurate SystemC/TLM Simulator for Deep Convolutional Neural Network Accelerators
    Yi-Che Lee, Ting-Shuo Hsu, Chun-Tse Chen and Jing-Jia Liou, National Tsing Hua University
  • 12:10 PM~12:30 PM
    D6-3 User-Friendly Compact Model of Magnetic Tunnel Junctions for Circuit Simulation Based on Switching Probability
    Haoyan Liu and Takashi Ohsawa, Waseda University

Wednesday, April 24, 1:30 PM~2:50 PM Ballroom C
D7 ： Analog Technique

  • 1:30 PM~1:50 PM
    D7-1 A CMOS 0.85-V 15.8-nW Current and Voltage Reference without Resistors
    Jing Wang and Hirofumi Shinohara, Waseda University
  • 1:50 PM~2:10 PM
    D7-2 A Light Energy Harvesting Single-Inductor Dual-Input Dual-Output Converter for WSN
    Peng-Chang Huang and Tai-Haur Kuo, National Cheng Kung University
  • 2:10 PM~2:30 PM
    D7-3 A 15-bit 20 MS/s SHA-Less Pipelined ADC Achieving 73.7 dB SNDR with Averaging Correlated Level Shifting Technique
    Tsung-Chih Hung, Tai-Haur Kuo and Jia-Ching Wang, National Cheng Kung University 
  • 2:30 PM~2:50 PM
    D7-4 10-Bit SAR ADC With Novel Pseudo-Random Capacitor Switching Scheme
    Pai-Hsiang Hsu, Yueh-Ru Lee and Chung-Chih Hung, National Chiao Tung University

Wednesday, April 24, 1:30 PM~2:50 PM Ballroom D
D8 ： Novel Embedded System Design and Application

  • 1:30 PM~1:50 PM
    D8-1 Efficient Write Scheme for Algorithm-based Multi-ported Memory
    Bo-Ya Chen, Bo-En Chen and Bo-Cheng Lai, National Chiao Tung University
  • 1:50 PM~2:10 PM
    D8-2 Efficient Dynamic Fixed-Point Quantization of CNN Inference Accelerators for Edge Devices
    Yueh-Chi Wu, and Chih-Tsun Huang, National Tsing Hua University
  • 2:10 PM~2:30 PM
    D8-3 EcoSim: A Smartphone-Based Sensor-Node Simulator with Native Sensor and Protocol-Stack Emulation

    Chung-Yi Kao Cheng-Ting Lee,Yu-Hung Yeh, Jui Feng Sung and Pai H. Chou, National Tsing Hua University

  • 2:30 PM~2:50 PM
    D8-4 BlueBox: A Complete Recorder for Code-Blue Events in Hospitals
    Hsinchung Chen1,Subramanian Meenakshi Sundaram1, Ali Heydari-Gorji1, Seyede Mahya Safavi1, Cheng-Ting Lee2, Pai H. Chou1 and Ruey-Kang Chang3,
    1UC Irvine
    2National Tsing Hua University
    3NeoVative, Inc.

Wednesday, April 24, 3:10 PM~4:10 PM Ballroom C
D9 ： Digital Solution

  • 3:10 PM~3:30 PM
    D9-1 A 50 Gb/s Adaptive ADFE with SNR Based Power Magagement for 2-PAM Systems
    Chee-Kit Ng, Yu-Chun Lin, and Shyh-Jye Jou, National Chiao Tung University
  • 3:30 PM~3:50 PM
    D9-2 Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICs
    Yu-Zhe Wang1, Jingjie Wu2, Shi-Hao Chen3, Mango Chia-Tso Chao4 and Chia-Hsiang Yang1,
    1National Taiwan University
    2Canaan Inc. 
    3DigWise Technology Ltd.
    4National Chiao Tung University
  • 3:50 PM~4:10 PM
    D9-3 High-Throughput 64K-point FFT Processor for THz Imaging Radar System
    Chia-Kai Chan, Hong-Ke Lin and Chih-Wei Liu, National Chiao Tung University

Wednesday, April 24, 4:30 PM~5:30 PM Ballroom C
D11 ： Advanced EDA Techniques from Routing to System

  • 4:30 PM~4:50 PM
    D11-1 Supervised-Learning Congestion Predictor For Routability-Driven Global Routing

    Zhonghua Zhou1,Tsung-Yi Ho2 and Andre Ivanov1,
    1Univeristy of British Columbia
    2National Tsing Hua University

  • 4:50 PM~5:10 PM
    D11-2 Event-Driven Model for High Speed End-to-End Simulations of Transmission System with Non-linear Optical Elements and Cascaded Clock-and-Data Recovery Circuits
    Jun Matsui and Hisakatsu Yamaguchi, Fujitsu Laboratories LTD.
  • 5:10 PM~5:30 PM
    D11-3 TEMPO: Thermal-Efficient Management of Power in High-Throughput Network Switches
    Tom Munk1, Hillel Kugler2, Ofir Maori1 and Adam Teman2,
    1Mellanox Technologies
    2Bar-Ilan University

Thursday, April 25, 10:20 AM~11:20 AM Mezzanine A+B
D14 ： Intelligent Systems

  • 10:20 AM~10:40 AM
    D14-1 Energy Efficient CNN Inference Accelerator using Fast Fourier Transform
    Ya-Chin Chung, Po-Hsiang Cheng and Chih-Wei Liu, National Chiao Tung University
  • 10:40 AM~11:00 AM
    D14-2 Design of an Adaptive and Reliable Network on Chip router architecture using FPGA
    Khyamling Parane, Prabhu Prasad B M, Basavaraj Talawar, National Institute of Technology Karnataka
  • 11:00 AM~11:20 AM
    D14-3 High-Performance NoC Simulation Acceleration framework employing the Xilinx DSP48E1 blocks
    Prabhu Prasad B M, Khyamling Parane, Basavaraj Talawar, National Institute of Technology Karnataka

Thursday, April 25, 11:30 AM~12:30 PM Mezzanine A+B
D16 ： Wireless Communication Circuit

  • 11:30 AM~11:50 AM
    D16-1 A 39 GHz Reflection-Type Phase Shifter for Reflectarray Antenna Application
    Yu-Ting Lin, Chiao-Yun Hsiao, Pei-Ling Chi and Chien-Nan Kuo, National Chiao Tung University
  • 11:50 AM~12:10 PM
    D16-2 A 9mW 6-9GHz 2.5Gb/s Proximity Transmitter with Combined OOK/BPSK Modulation for Low Power Mobile Connectivity
    Yuguang Liu, Haixin Song, Kunnong Zeng, Woogeun Rhee and Zhihua Wang, Tsinghua University
  • 12:10 PM~12:30 PM
    D16-3 Design and Analysis of Data-Pattern-Insensitive Phase-Tracking Receivers with Fully-Balanced FSK Modulatio
    Yining Zhang, Jiahao Zhao,Woogeun Rhee and Zhihua Wang,Tsinghua University

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