Thursday, April 25, 10:20 AM~11:20 AM Ballroom D
D13 New EDA Challenges and Solutions for Modern IC Design Applications

  • the photo of Speaker
    10:20 AM~10:40 AM
    D13-1 Failure Root Cause Analysis Automation on Functional Simulation Regressions
    Chia-Chih Yen
    Synopsy
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    10:40 AM~11:00 AM
    D13-2 Physical Design Automation for Big Chip – Challenges and Opportunities
    Yih-Chih Chou
    Global Unichip 
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    11:00 AM~11:30 AM
    D13-3 Machine Learning Applications and Opportunities in IC Design Flow
    Matt Luo
    Novatek  

Thursday, April 25, 11:30 AM~12:30 PM Ballroom D
D15 AI Computing and Acceleration

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    11:30 AM~11:50 AM
    D15-1 ONNC: A Compilation Framework Connecting ONNX to Proprietary Deep Learning Accelerators
    Luba Tang
    Skymizer Taiwan, Inc.
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    11:50 AM~12:10 PM
    D15-2 Heterogeneous Computing for Edge AI
    Pei-Kuei Tsung
    Mediatek 
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    12:10 PM~12:30 PM
    D15-3 Customization of a Deep Learning Accelerator
    Shien-Chun Luo
    Industrial Technology Research Institute

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