Tuesday, April 17, 1:30 PM~3:10 PM Ballroom A
T1 Contacts & Interconnects

  • the photo of Speaker
    1:30 PM~2:05 PM
    T1-1 Applications of 2D Materials in Interconnect Technology (Invited Talk)
    Zhi-Hong Chen
    Purdue University, USA
  • 2:05 PM~2:25 PM
    T1-2 Novel Solutions to Enable Contact Resistivity <1E-9 ohms-cm2 for 5nm Node and Beyond
    Raymond Hung, Fareen Adeni Khaja, Kelly E Hollar, KV Rao, Samuel Munnangi, Yongmei Chen, Motoya Okazaki, Yi-Chiau Huang, Xuebin Li, Hua Chung, Osbert Chan, Christopher Lazik, Miao Jin, Hongwen Zhou, Abhilash Mayur, Namsung Kim and Ellie Yieh
    Applied Materials, USA
  • 2:25 PM~2:45 PM
    T1-3 BEOL Compatible Sub-nm Diffusion Barrier for Advanced Cu Interconnects
    Chun-Li Lo, Kehao Zhang*, Joshua A. Robinson* and Zhihong Chen 
    Purdue University, USA
    *The Pennsylvania State University, USA 
  • 2:45 PM~3:05 PM
    T1-4 ZnON Contacts Enabling High-performance 3-D InGaZnO Inverters
    Chin-I Kuan, Kang-Ping Peng, Horng-Chih Lin and Pei-Wen Li
    National Chiao Tung University, Taiwan

Tuesday, April 17, 5:30 PM~6:30 PM Ballroom C
T3 Poster Session

  • 5:30 PM~6:30 PM
    T3-1 Temperature Effect on Operations and Characteristics of p-channel FinFET Dielectric RRAM
    Jen Chieh Kuo, Ya-Chin King and Chrong-Jung Lin
    National Tsing Hua University, Taiwan 
  • 5:30 PM~6:30 PM
    T3-2 Temperature and Stress Effect of Random Telegraph Noise in FIND RRAM Arrays
    Chin Yuan Chen, Chrong Jung Lin and Ya-Chin King
    National Tsing Hua University, Taiwan 
  • 5:30 PM~6:30 PM
    T3-3 Electrical characteristics of gate-all-around MOSFET ring oscillators using TCAD simulation
    Sutae Kim, Minsuk Kim, Sola Woo, Hyungu Kang and Sangsig Kim
    Korea University, South Korea
    Samsung Electronics, South Korea 
  • 5:30 PM~6:30 PM
    T3-4 Interface Discrete Trap Induced Variability for Negative Capacitance FinFETs
    Ho-Pei Lee, Kuei-Yang Tseng and Pin Su
    National Chiao-Tung University, Taiwan 
  • 5:30 PM~6:30 PM
    T3-5 Glassy-Electret Random Access Memory – A naturally Nanoscale Memory Concept
    Vasileia Georgiou*, Jason P. Campbell, Pragya R. Shrestha**, Dimitris E. Ioannou* and Kin P. Cheung
    National Institute of Standards and Technology, USA
    *George Mason University, USA
    **Theiss Research, USA 
  • 5:30 PM~6:30 PM
    T3-6 Accurate Self-heating Assessment Employing Multi-stage Thermal RC Network
    Wangyong Chen, Linlin Cai, Kunliang Wang, Xing Zhang*, Xiaoyan Liu and Gang Du
    Peking University, China
    *National Key Laboratory of Science and Technology on Micro/Nano Fabrication, China
  • 5:30 PM~6:30 PM
    T3-7 TaOx/HfO2-Based RRAM with Self-Selective Feature Caused by Current Compliance Modulation
    Yue Xi, Huaqiang Wu, Bin Gao, Xinyi Li, Wei Wu, Dong Wu, Ning Deng and He Qian
    Tsinghua University, China 
  • 5:30 PM~6:30 PM
    T3-8 Evaluation of Circuit Performance Degradation due to CNT Process Imperfection
    Kaship Sheikh and Lan Wei
    University of Waterloo, Canada 
  • 5:30 PM~6:30 PM
    T3-9 Steep Slope 2D Strain Field Effect Transistor: 2D-SFET
    Daniel Schulman, Andrew Arnold and Saptarshi Das
    The Pennsylvania State University, USA 
  • 5:30 PM~6:30 PM
    T3-10 Carrier Conduction in SiO2/GaN Structure with Abrupt Interface
    Nguyen Xuan Truyen*, Noriyuki Taoka*, Akio Ohta, Hisashi Yamada*, Tokio Takahashi*, Mitsuhisa Ikeda, Katsunori Makihara, Mitsuaki Shimizu* and Seiichi Miyazaki
    Graduate School of Engineering, Nagoya University, Japan
    *GaN-OIL, National Institute of Advanced Industrial Science and Technology, Japan
  • 5:30 PM~6:30 PM
    T3-11 A New and Simple DC Method for Thermal-Resistance Extraction of Scaled FinFET Devices
    Wei-Cheng Huang and Pin Su
    National Chiao Tung University, Taiwan
  • 5:30 PM~6:30 PM
    T3-12 Modeling of SOI uniformity impact on silicon photonic grating coupler performance compared to other process variation sources
    Gweltaz Gaudin, Daivid Fowler *, Céline Cailler and Arnaud Rigny
    Soitec Bernin, France
    *CEA LETI, France

Wednesday, April 18, 10:20 AM~12:35 PM Ballroom A
T4 Novel Devices

  • the photo of Speaker
    10:20 AM~10:55 AM
    T4-1 From Charge Spin Logic to Probabilistic Spin Logic – An Experimental Approach(Invited Talk)
    Joerg Appenzeller
    Purdue University, USA 
  • 10:55 AM~11:15 AM
    T4-2 Steep slope 2D negative capacitance CMOS devices: MoS2 and WSe2
    Mengwei Si and Peide D. Ye
    Purdue University, USA 
  • 11:15 AM~11:35 AM
    T4-3 Investigation of the Abrupt Phase Transition in 1T-TaS2/MoS2 Heterostructures
    Benjamin Grisafe, Rui Zhao*, Matthew Jerry, Joshua A. Robinson* and Suman Datta
    University of Notre Dame, USA
    *The Pennsylvania State University, USA 
  • 11:35 AM~11:55 AM
    T4-4 A New High Voltage IC with Robust Isolation Design
    Vivek Ningaraju*, Horng-Chih Lin, Po-An Chen* and Jiin-Shiarng Wen*
    National Chiao Tung University, Taiwan
    *Nuvoton Technology Corporation, Taiwan 
  • 11:55 AM~12:15 PM
    T4-5 Modeling of GaN HEMTs on Silicon with Trapping and Self-heating Effects for RF Applications
    Chuan-Wei Tsou, Po-Tsung Tu, Kan-Hsueh Tsai, Po-Chun Yeh, Heng-Yuan Lee, Li-Heng Lee and Shawn S. H. Hsu*
    Industrial Technology Research Institute, Taiwan
    *National Tsing Hua University, Taiwan 
  • 12:15 PM~12:35 PM
    T4-6 All Optical NOR Gate via Tunnel-Junction Transistor Lasers for High Speed Optical Logic Processors
    Milton Feng, Ardy Winoto, Junyi Qiu, Yu-Ting Peng and Nick Holonyak, Jr.
    University of Illinois, USA

Wednesday, April 18, 10:20 AM~12:20 PM Ballroom C

  • 10:20 AM~10:40 AM
    T6-1 Excellent High Temperature Retention of TiOxNy ReRAM by Interfacial Layer Engineering
    Yu-Hsuan Lin*, Dai-Ying Lee, Chao-Hung Wang, Ming-Hsiu Lee, Yung-Han Ho, Erh-Kun Lai, Kuang-Hao Chiang, Hsiang-Lan Lung, Keh-Chung Wang, Tseung-Yuen Tseng* and Chih-Yuan Lu
    Macronix International Co., Ltd., Taiwan
    *National Chiao Tung University, Taiwan 
  • 10:40 AM~11:00 AM
    T6-2 A Novel ReWritable One-Time-Programming OTP (RW-OTP) Realized by Dielectric-fuse RRAM Devices Featuring Ultra-High Reliable Retention and Good Endurance for Embedded Applications
    H.W. Cheng, E. R. Hsieh, Z. H. Huang, C. H. Chuang, C. H. Chen, F. L. Li*, Y. M. Lo*, C. H. Liu* and Steve S. Chung
    National Chiao Tung University, Taiwan
    *National Taiwan Normal University, Taiwan 
  • 11:00 AM~11:20 AM
    T6-3 Synaptic Properties Considering Temperature Effect in HfOx-Based Memristor – Demonstration of Homo-thermal Synaptic Behaviors
    Jia-Chen*, Sungjun Kim, Ying-Chen Chen**, Min-Hwi Kim, Yi Li*, Xiang-Shui Miao*, Yao-Feng Chang#, Byung-Gook Park and Jack C. Lee**
    Seoul National University, South Korea
    *Huazhong University of Science and Technology, China
    **The University of Texas at Austin, USA
    #Micron Technology Inc, USA 
  • 11:20 AM~11:40 AM
    T6-4 A Novel RRAM-based Adaptive-Threshold LIF Neuron Circuit for High Recognition Accuracy
    Xinxin Wang, Peng Huang, Zhen Dong, Zheng Zhou, Yuning Jiang, Runze Han, Lifeng Liu, Xiaoyan Liu and Jinfeng Kang
    Peking University, China 
  • 11:40 AM~12:00 PM
    T6-5 Enhanced Performance of Ag-filament Threshold Switching Selector by Rapid Thermal Processing
    Qilin Hua, Huaqiang Wu, Bin Gao and He Qian
    Tsinghua University, China 
  • 12:00 PM~12:20 PM
    T6-6 Statistical analysis of CBRAM endurance
    D. Alfaro Robayo*, C. Nail, G. Sassine, J. F. Nodin, M. Bernard, Q. Raffay*, G. Ghibaudo*, G. Molas and E. Nowak
    CEA LETI Minatec Campus, France
    *IMEP LAHC CNRS, France 

Wednesday, April 18, 1:30 PM~3:10 PM Ballroom A
T7 Memory

  • 1:30 PM~1:50 PM
    T7-1 P-STT-MRAM Thermal stability and modeling of its temperature dependence
    L. Tillie*, B. Dieny*, R. C. Sousa*, J. Chatterjee* , S. Auffret*, N. Lamard*, J. Guelffucci*, E. Nowak and I.L. Prejbeanu
    CEA-LETI, Minatec Campus, France
    *SPINTEC, Univ., France 
  • 1:50 PM~2:10 PM
    T7-2 RTN Modulation by Neighboring Word-Line Vt Level in 1Xnm Floating Gate NAND Strings
    C.C.Cheng, Y.H. Chen, C.P. Wang, C.H. Cheng, C.W. Lee, T.W. Lin, S.H. Ku, Y.W. Chang, W.J. Tsai, T.C. Lu, K.C. Chen, Tahui Wang and Chih-Yuan Lu
    Macronix International Company Ltd., Taiwan 
  • 2:10 PM~2:30 PM
    T7-3 A new method for test chip and single 40nm NOR Flash cell electrical parameters correlation using a CAST structure
    T. Kempf*,**, V. Della Marca*, P. Canet*, A. Regnier, P. Masson** and J.-M. Portal*
    STMicroelectronics, France 
    *Aix-Marseille University, France 
    **Nice Sophia-Antipolis University, France 
  • 2:30 PM~2:50 PM
    T7-4 Novel IrOx/SiO2/W cross-point memory for Lysyl-oxidase-like-2 (LOXL2) breast cancer biomarker detection
    S. Jana, S. Samanta, S. Roy, J. T. Qiu* and S. Maikap*
    Chang Gung University, Taiwan
    *Chang Gung Memorial Hospital, Taiwan 
  • 2:50 PM~3:10 PM
    T7-5 Prostate cancer biomarker detection by using Si nanowire based electrolyte/NiOx/SiO2/n-Si sensors
    Anisha Roy, Jian-Tai Qiu* and Siddheswar Maikap*
    Chang Gung University, Taiwan
    *Chang Gung Memorial Hospital, Taiwan 

Thursday, April 19, 10:20 AM~12:20 PM Ballroom B
T10 Conventional Devices

  • 10:20 AM~10:40 AM
    T10-1 Damageless and Conformal Doping for FinFETs by Spin-Coated Phosphorus Doped Silica
    Takashi Matsukawa, Takahiro Mori, Yoshihiro Sawada*, Yohei Kinoshita*, Yongxun Liu and Meishoku Masahara
    National Institute of Advanced Industrial Science and Technology, Japan
    *Tokyo Ohka Kogyo Co., Ltd., Japan 
  • 10:40 AM~11:00 AM
    T10-2 Investigation of Self-Heating Effect on Stacked Nanosheet GAA Transistors
    Linlin Cai, Wangyong Chen, Gang Du, Jinfeng Kang, Xing Zhang* and Xiaoyan Liu
    Peking University, China
    *National Key Laboratory of Science and Technology on Micro/Nano Fabrication, China  
  • 11:00 AM~11:20 AM
    T10-3 HEtero-Layer-Lift-Off (HELLO) technology for enhanced hole mobility in UTB GeOI pMOSFETs
    Wen Hsin Chang, Toshifumi Irisawa, Hiroyuki Ishii, Hiroyuki Hattori, Noriyuki Uchida and Tatsuro Maeda
    National Institute of Advanced Industrial Science and Technology, Japan 
  • 11:20 AM~11:40 AM
    T10-4 Impact of Ge Oxidation States in GeOx Interfacial Layer on Electrical Characteristics of Ge pMOSFETs
    Shih-Han Yi, Kuei-Shu Chang-Liao, Chia-Wei Hsu, Jiayi Huang and Tzung-Yu Wu
    National Tsing Hua University, Taiwan 
  • 11:40 AM~12:00 PM
    T10-5 Mobility Calculation of Ge Nanowire Junctionless NFETs with Size and Geometry Dependence
    Hung-Yu Ye, Chia-Che Chung, I-Hsieh Wong, Huang-Siang Lan and C. W. Liu*
    National Taiwan University, Taiwan
    *National Nano Device Laboratories, Taiwan
  • 12:00 PM~12:20 PM
    T10-6 UTBSOI MOSFET with Corner Spacers for Energy-Efficient Applications
    Angada B. Sachid and Chenming Hu
    University of California Berkeley, USA