Tuesday, April 17, 1:30 PM~3:10 PM Ballroom A
T1 Contacts & Interconnects

  • the photo of Speaker
    1:30 PM~2:05 PM
    T1-1 Applications of 2D Materials in Interconnect Technology (Invited Talk)
  • 2:05 PM~2:25 PM
    T1-2 Novel Solutions to Enable Contact Resistivity <1E-9 ohms-cm2 for 5nm Node and Beyond
  • 2:25 PM~2:45 PM
    T1-3 BEOL Compatible Sub-nm Diffusion Barrier for Advanced Cu Interconnects
  • 2:45 PM~3:05 PM
    T1-4 ZnON Contacts Enabling High-performance 3-D InGaZnO Inverters

Tuesday, April 17, 5:30 PM~6:30 PM Ballroom C
T3 Poster Session

  • 5:30 PM~6:30 PM
    T3-1 Temperature Effect on Operations and Characteristics of p-channel FinFET Dielectric RRAM
  • 5:30 PM~6:30 PM
    T3-2 Temperature and Stress Effect of Random Telegraph Noise in FIND RRAM Arrays
  • 5:30 PM~6:30 PM
    T3-3 Electrical characteristics of gate-all-around MOSFET ring oscillators using TCAD simulation
  • 5:30 PM~6:30 PM
    T3-4 Interface Discrete Trap Induced Variability for Negative Capacitance FinFETs
  • 5:30 PM~6:30 PM
    T3-5 Glassy-Electret Random Access Memory – A naturally Nanoscale Memory Concept
  • 5:30 PM~6:30 PM
    T3-6 Accurate Self-heating Assessment Employing Multi-stage Thermal RC Network
  • 5:30 PM~6:30 PM
    T3-7 TaOx/HfO2-Based RRAM with Self-Selective Feature Caused by Current Compliance Modulation
  • 5:30 PM~6:30 PM
    T3-8 Evaluation of Circuit Performance Degradation due to CNT Process Imperfection
  • 5:30 PM~6:30 PM
    T3-9 Steep Slope 2D Strain Field Effect Transistor: 2D-SFET
  • 5:30 PM~6:30 PM
    T3-10 Carrier Conduction in SiO2/GaN Structure with Abrupt Interface
  • 5:30 PM~6:30 PM
    T3-11 A New and Simple DC Method for Thermal-Resistance Extraction of Scaled FinFET Devices
  • 5:30 PM~6:30 PM
    T3-12 Modeling of SOI uniformity impact on silicon photonic grating coupler performance compared to other process variation sources

Wednesday, April 18, 10:20 AM~12:35 PM Ballroom A
T4 Novel Devices

  • the photo of Speaker
    10:20 AM~10:55 AM
    T4-1 From Charge Spin Logic to Probabilistic Spin Logic – An Experimental Approach(Invited Talk)
  • 10:55 AM~11:15 AM
    T4-2 Steep slope 2D negative capacitance CMOS devices: MoS2 and WSe2
  • 11:15 AM~11:35 AM
    T4-3 Investigation of the Abrupt Phase Transition in 1T-TaS2/MoS2 Heterostructures
  • 11:35 AM~11:55 AM
    T4-4 A New High Voltage IC with Robust Isolation Design
  • 11:55 AM~12:15 PM
    T4-5 Modeling of GaN HEMTs on Silicon with Trapping and Self-heating Effects for RF Applications
  • 12:15 PM~12:35 PM
    T4-6 All Optical NOR Gate via Tunnel-Junction Transistor Lasers for High Speed Optical Logic Processors

Wednesday, April 18, 10:20 AM~12:20 PM Ballroom C
T6 RRAM

  • 10:20 AM~10:40 AM
    T6-1 Excellent High Temperature Retention of TiOxNy ReRAM by Interfacial Layer Engineering
  • 10:40 AM~11:00 AM
    T6-2 A Novel ReWritable One-Time-Programming OTP (RW-OTP) Realized by Dielectric-fuse RRAM Devices Featuring Ultra-High Reliable Retention and Good Endurance for Embedded Applications
  • 11:00 AM~11:20 AM
    T6-3 Synaptic Properties Considering Temperature Effect in HfOx-Based Memristor – Demonstration of Homo-thermal Synaptic Behaviors
  • 11:20 AM~11:40 AM
    T6-4 A Novel RRAM-based Adaptive-Threshold LIF Neuron Circuit for High Recognition Accuracy
  • 11:40 AM~12:00 PM
    T6-5 Enhanced Performance of Ag-filament Threshold Switching Selector by Rapid Thermal Processing
  • 12:00 PM~12:20 PM
    T6-6 Statistical analysis of CBRAM endurance

Wednesday, April 18, 1:30 PM~3:10 PM Ballroom A
T7 Memory

  • 1:30 PM~1:50 PM
    T7-1 P-STT-MRAM Thermal stability and modeling of its temperature dependence
  • 1:50 PM~2:10 PM
    T7-2 RTN Modulation by Neighboring Word-Line Vt Level in 1Xnm Floating Gate NAND Strings
  • 2:10 PM~2:30 PM
    T7-3 A new method for test chip and single 40nm NOR Flash cell electrical parameters correlation using a CAST structure
  • 2:30 PM~2:50 PM
    T7-4 Novel IrOx/SiO2/W cross-point memory for Lysyl-oxidase-like-2 (LOXL2) breast cancer biomarker detection
  • 2:50 PM~3:10 PM
    T7-5 Prostate cancer biomarker detection by using Si nanowire based electrolyte/NiOx/SiO2/n-Si sensors

Thursday, April 19, 10:20 AM~12:20 PM Ballroom B
T10 Conventional Devices

  • 10:20 AM~10:40 AM
    T10-1 Damageless and Conformal Doping for FinFETs by Spin-Coated Phosphorus Doped Silica
  • 10:40 AM~11:00 AM
    T10-2 Investigation of Self-Heating Effect on Stacked Nanosheet GAA Transistors
  • 11:00 AM~11:20 AM
    T10-3 HEtero-Layer-Lift-Off (HELLO) technology for enhanced hole mobility in UTB GeOI pMOSFETs
  • 11:20 AM~11:40 AM
    T10-4 Impact of Ge Oxidation States in GeOx Interfacial Layer on Electrical Characteristics of Ge pMOSFETs
  • 11:40 AM~12:00 PM
    T10-5 Mobility Calculation of Ge Nanowire Junctionless NFETs with Size and Geometry Dependence
  • 12:00 PM~12:20 PM
    T10-6 UTBSOI MOSFET with Corner Spacers for Energy-Efficient Applications

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