Tuesday, April 17, 1:30 PM~5:20 PM Ballroom B
J3 Joint Special Session : Design and Technology Co-Optimization

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    1:30 PM~2:05 PM
    J3-1 Analysis of Thermal Effects in Integrated Radio Transmitters
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    2:05 PM~2:40 PM
    J3-2 Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic pathfinding DTCO of advanced transistors
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    2:40 PM~3:15 PM
    J3-3 Systematic Co-Optimization From Chip Design, Process Technology To Systems For GPU AI Chip
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    3:35 PM~4:10 PM
    J3-4 Machine Learning for IC Design and Technology Co-Optimization in Extreme Scaling
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    4:10 PM~4:45 PM
    J3-5 Abundant-Data Computing: The N3XT 1,000X
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    4:45 PM~5:20 PM
    J3-6 Co-designed Systems for Deep Learning Hardware Accelerators

Wednesday, April 18, 1:30 PM~5:20 PM Ballroom B
J6 Joint special session : Technology and Design Challenges for Next Generation Communication

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    1:30 PM~2:05 PM
    J6-2 Emerging Technologies and Concepts for 5G Applications
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    2:05 PM~2:40 PM
    J6-3 GaN-based digital transmitter architectures for 5G
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    2:40 PM~3:15 PM
    J6-1 Antenna-in-Package Design and Module Integration for Millimeter-Wave Communication and 5G
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    3:35 PM~4:10 PM
    J6-4 5G mmWave communication: from system concept to implementation
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    4:10 PM~4:45 PM
    J6-5 Phased array technique for mm-wave wireless communication
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    4:45 PM~5:20 PM
    J6-6 Massive MIMO Detection VLSI Design

Wednesday, April 18, 10:20 AM~12:05 PM Ballroom D
D4 DAT Special Session : Machine Learning for EDA

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    10:20 AM~10:55 AM
    D4-1 Digital Intelligence and Chip Design
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    10:55 AM~11:30 AM
    D4-2 Machine Learning Further Improving Place and Route QoR
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    11:30 AM~12:05 PM
    D4-3 Machine Learning Opportunities and Applications in SoC Design

Wednesday, April 18, 1:30 PM~3:15 PM Ballroom D
D8 DAT Special Session : Innovative Approaches on Hardware Security Enhancements

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    1:30 PM~2:05 PM
    D8-1 On IC Traceability via Blockchain
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    2:05 PM~2:40 PM
    D8-2 Side-Channel-Aware LSI design
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    2:40 PM~3:15 PM
    D8-3 A Foundry’s View on Hardware Security

Wednesday, April 18, 3:35 PM~5:20 PM Ballroom D
D10 DAT Special Session : Sensing, Computing, and Connectivity Technology for Autonomous Driving Vehicles

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    3:35 PM~4:10 PM
    D10-1 CMOS Single-Photon Detectors for Vehicle LiDAR – Status and Trends
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    4:10 PM~4:45 PM
    D10-2 Safe and Secure SOC Architecture for Autonomous Driving
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    4:45 PM~5:20 PM
    D10-3 V2V & V2I for Connected Vehicle

Thursday, April 19, 10:20 AM~12:05 PM Ballroom C
D12 DAT Special Session : IC Design for Machine Learning

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    10:20 AM~10:55 AM
    D12-1 End-to-End Hardware Accelerator for Deep Convolutional Neural Network
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    10:55 AM~11:30 AM
    D12-2 Efficient Method for AI Computing
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    11:30 AM~12:05 PM
    D12-3 A glance of the CASLab HSAIL SIMT GPU for OpenCL and TensorFlow Applications

Thursday, April 19, 10:20 AM~11:20 AM Ballroom D
D13 Industrial Session : System Level Testing and Security

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    10:20 AM~10:40 AM
    D13-1 Beyond Structural Test, the rising need for System-Level Test
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    10:40 AM~11:00 AM
    D13-2 Adaptive Test Method on Production System-Level Testing (SLT) to Optimize Test Cost, Resources and Defect Parts per Million (DPPM)
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    11:00 AM~11:20 AM
    D13-3 Fuzz Testing & Software Composition Analysis in Software Engineering

Thursday, April 19, 11:30 AM~12:30 PM Ballroom D
D15 Industrial Session : AI everywhere: where will you be?

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    11:30 AM~11:50 AM
    D15-1 Technology Trend of Edge AI
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    11:50 AM~12:10 PM
    D15-2 Deep Fusion of Heterogeneous Sensor Modalities for the Advancements of ADAS to Autonomous Vehicles
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    12:10 PM~12:30 PM
    D15-3 Acceleration of Neural Network Model Execution on Embedded Systems

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