Tuesday, April 25, 11:50 AM~12:20 PM Ballroom D
T1 Poster Session

  • T1-1 Analytical Solution for RESURF and Breakdown Characteristics of Finger STI DEMOS Transistors
  • T1-2 Impacts of Work Function Variation and Line Edge Roughness on Hybrid TFET-MOSFET Monolithic 3D SRAMs
  • T1-3 Evaluation of Analog Performance of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) MOSFETs
  • T1-4 Performance Evaluation of Pass-Transistor-Based Circuits using Monolayer and Bilayer 2-D Transition Metal Dichalcogenide (TMD) MOSFETs for 5.9nm Node
  • T1-5 Twin Gate Tunnel FET based Capacitorless Dynamic Memory
  • T1-6 Ge n-channel FinFET Performance Enhancement Using Low Work Function Metal-Interfacial Layer-Ge Contacts
  • T1-7 Investigation and Comparison of Design Space for Ultra-Thin-Body GeOI/SOI Negative Capacitance FETs
  • T1-8 Temperature Compensated Super-High-Frequency (2-8 GHz) Surface Acoustic Wave Devices
  • T1-9 Impact of Substrate on the Frequency Behavior of Trans-conductance in Ultra-thin Body and BOX FDSOI MOS Devices – A Physical Insight
  • T1-10 TCAD-Based Characterization of Logic Cells: Power, Performance, Area, and Variability
  • T1-11 Scaling of Gate Dielectric on Ge Substrate (Late News Paper)

Wednesday, April 26, 10:20 AM~11:40 AM Ballroom A

  • T4-1 Filament Control of Field-Enhanced WOx Resistive Memory Toward Low Power Applications
  • T4-2 Occurrence and Solution to Overcome 1st RESET Resistance Pinning Effect in Ti/HfOx based RRAM for Low Power Nonvolatile Memory Applications
  • T4-3 A High Accuracy and Robust Machine Learning Network for Pattern Recognition Based on Binary RRAM devices
  • T4-4 Design and Optimization of Strong Physical Unclonable Function (PUF) Based on RRAM Array

Wednesday, April 26, 10:20 AM~11:40 AM Ballroom B
T5 Interface and 3D Integration

  • T5-1 A Universal Model for Interface-type Threshold Switching Phenomena by Comprehensive Study of Vanadium Oxide-Based Selector
  • T5-2 On the Physical Modeling of Random Telegraph Noise (RTN) Amplitude in Nanoscale MOSFETs: From Ideal to Statistical Devices
  • T5-3 A Design Methodology of Efficient On-Chip Wireless Power Transmission
  • T5-4 Development and Electrical Investigation of Through Glass Via and Through Si Via in 3D Integration

Wednesday, April 26, 1:30 PM~3:10 PM Ballroom A
T6 Novel Device

  • T6-1 Contact Engineering and Channel Doping for Robust Carbon Nanotube NFETs
  • T6-2 Asymmetric S/D Contacts with BN Tunneling Barrier on Black Phosphorous FETs
  • T6-3 Density Functional Theory Molecular Dynamics Simulations and Experimental Measurements of a-HfO2/a-SiO/SiGe(001) and a-HfO2/a-SiO2/SiGe(001) interfaces
  • T6-4 A Steep Slope Phase-FET based on 2D MoS2 and the Electronic Phase Transition in VO2
  • T6-5 Ion Implantation after Germanidation technique for Low Thermal Budget Ge CMOS devices: from Bulk Ge to UTB-GeOI substrate
  • T6-6 Selective Etching of Silicon in Preference to Germanium and Si0.5Ge0.5 (Late News Paper)

Wednesday, April 26, 3:30 PM~4:50 PM Ballroom A
T7 Transistor

  • T7-1 I/O Device Optimization Techniques Tailored for Highly-scaled FinFET Technology
  • T7-2 Stressor Design for FinFETs with Air-Gap Spacers
  • T7-3 Semiconductor-On-Insulator Lateral Bipolar Transistors for High-Speed Low-Power Applications
  • T7-4 A Novel Design of P-N Staggered Face-tunneling TFET Targeting for Low Power and Appropriate Performance Applications
  • T7-5 Ferroelectricity in HfO2 thin films as a function of Zr doping (Late News Paper)
  • the photo of Speaker
    T7-6 Integration of III-V Nanowires for the next RF- and logic technology generation (Invited Talk)

Thursday, April 27, 10:20 AM~12:00 PM Ballroom B
T9 Memory

  • T9-1 Exploration and Evaluation of TCAM with Hybrid Tunneling FET and FinFET Devices for Ultra-Low-Voltage Applications
  • T9-2 Dense N over CMOS 6T SRAM Cells using 3D Sequential Integration
  • T9-3 An Investigation of Program Disturb Characteristics and Data Pattern Effect in 128G 3D NAND Flash Memories
  • T9-4 Hardware Implementation of Physically Unclonable Function (PUF) in Perpendicular STT MRAM
  • T9-5 A Magnetic Shift Register with Periodic Potential Energy Modulation