J2 ： Joint Special Session: Foundry Eco-system

1:30 PM~5:20 PM,Tuesday , April 25 Ballroom B

• 
  J2-1 TCAD Based Design-Technology Co-Optimisations in advanced technology nodes
  

  Tuesday , April 25

  Asen Asenov

  Glasgow University and Synopsys, United Kingdom

• 
  J2-2 New Embedded Memories, from Lab to Fab
  

  1:30 PM~5:20 PM,Tuesday , April 25

  David Eggleston

  GLOBALFOUNDRIES, USA

• 
  J2-3 Industrial performance to serve economical rebound
  

  Tuesday , April 25

  Bertrand Bléneau

  Soitec, France 

• 
  J2-4 Building best in class System solutions : Enabled by collaboration
  

  Tuesday , April 25

  Suhita Devineni

  GLOBALFOUNDRIES, USA 

• 
  J2-5 Collaboration and Innovation for Your Success
  

  Tuesday , April 25

  David Shih

  SMIC, China

• 
  J2-6 Navigating through the fragmented application maze
  

  Tuesday , April 25

  Keh-Ching Huang

  UMC, Taiwan

• 
  J2-7 RRAM Technology and Its Embedded Potential on IoT Applications
  

  Tuesday , April 25

  ChiaHua Ho

  Winbond Electronics Corporation, Taiwan

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J5 ： Joint Special Session: Embedded Memory System

1:30 PM~5:20 PM,Wednesday , April 26 Ballroom B

• 
  J5-1 Novel memory hierarchy with e-STT-MRAM for near-future applications
  

  1:30 PM~2:05 PM,Wednesday , April 26

  Shinobu Fujita

  Toshiba Corporation, Japan 

• 
  J5-2 Low-Current Spin Transfer Torque MRAM
  

  Tuesday , April 26

  Guohan Hu

  IBM T. J. Watson Research Center, USA 

• 
  J5-3 Embedded Nonvolatile Memory with STT-MRAMs and its Application for Nonvolatile Brain-Inspired VLSIs
  

  Wednesday , April 26

  Tetsuo Endoh

  Tohoku University, Japan 

• 
  J5-4 Embedded non-volatile memory design from cell to system levels
  

  Wednesday , April 26

  Takashi Kono

  Renesas Electronics, Japan

• 
  J5-5 STT-MRAM memories for IoT applications: challenges and opportunities at circuit level and above
  

  Wednesday , April 26

  Massimo Alioto

  National University of Singapore, Singapore

• 
  J5-6 Utilizing NVDIMM to alleviate the I/O Performance Gap for Big Data Workloads
  

  Wednesday , April 26

  Zili Shao

  The Hong Kong Polytechnic University, Hong Kong

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T2 ： Special Session: Future of Lithography

1:30 PM~3:15 PM,Tuesday , April 25 Ballroom A

• 
  T2-1 EUV extendibility research at Berkeley Lab
  

  Thursday , April 27

  Patrick Naulleau
  Lawrence Berkeley National Laboratory, USA 

• 
  T2-2 DSA : Progress Toward Industry Acceptance
  

  Thursday , April 27

  Anthony R. Vander Heyden 

  Brewer Science Inc., USA

• 
  T2-3 Electron Multi-Beam Technology
  

  Thursday , April 27

  Elmar Platzgummer

  IMS Nanofabrication AG, Austria

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T3 ： Special Session: Emerging Research Device

3:35 PM~5:55 PM,Tuesday , April 25 Ballroom A

• 
  T3-1 Negative Capacitance FETs with Steep Switching by Ferroelectric Hf-based Oxide
  

  Wednesday , April 26

  Min-Hung Lee

  National Taiwan Normal University, Taiwan 

• 
  T3-2 III-V/Ge MOSFETs and TFETs for Ultra-Low Power Logic LSIs
  

  Wednesday , April 26

  Shinichi Takagi

  The University of Tokyo, Japan 

• 
  T3-3 High Performance PMOS with Strained High-Ge-Content SiGe Fins for Advanced Logic Applications
  

  Wednesday , April 26

  Pouya Hashemi

  IBM Research, USA 

• 
  T3-4 InGaAs Quantum-Well MOSFETs for future logic applications
  

  Wednesday , April 26

  Dae-Hyun Kim

  Kyungpook National University, South Korea 

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T8 ： Special Session: 2016 Technology Highlights

10:20 AM~12:40 PM,Thursday , April 27 Ballroom A

• 
  T8-1 Device-Architecture Co-Design for Hyperdimensional Computing with 3D Vertical Resistive Switching Random Access Memory (3D VRRAM)
  

  Thursday , April 27

  Haitong Li

  Stanford University, USA 

• 
  T8-2 1x- to 2x-nm MTJ switching at sub-3 ns pulses with compatible current in sub-20 nm CMOS for high performance embedded STT-MRAM
  

  Thursday , April 27

  Daisuke Saida

  Toshiba Corporation, Japan

• 
  T8-3 Back-Side Integration of Hybrid III-V on Silicon DBR Lasers
  

  Thursday , April 27

  Karim Hassan

  CEA-LETI, France

• 
  T8-4 Novel TFET Circuits for High-Performance Energy-Efficient Heterogeneous MOSFET/TFET Logic
  

  Thursday , April 27

  Daniel H. Morris

  Intel Corporation, USA

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PAGE CONTENTS

• -J2 :
   Joint Special Session: Foundry Eco-system
• -J5 :
   Joint Special Session: Embedded Memory System
• -T2 :
   Special Session: Future of Lithography
• -T3 :
   Special Session: Emerging Research Device
• -T8 :
   Special Session: 2016 Technology Highlights